CPU design

Overview
CPU design focuses on these areas:

datapaths (such as ALUs and pipelines)
control unit: logic which controls the datapaths
Memory components such as register files, caches
Clock circuitry such as clock drivers, PLLs, clock distribution networks
Pad transceiver circuitry
Logic gate cell library which is used to implement the logic
CPUs designed for high performance markets might require custom designs for each of these items to achieve frequency, power-dissipation, and chip-area goals.

CPUs designed for lower performance markets might lessen the implementation burden by:

acquiring some of these items by purchasing them as intellectual property
use control logic implementation techniques (logic synthesis using CAD tools) to implement the other components - datapaths, register files, clocks
Common logic styles used in CPU design include:

unstructured random logic
finite state machines
microprogramming (common from 1965 to 1985, no longer common except for CISC CPUs)
programmable logic array (common in the 1980s, no longer common)
Device types used to implement the logic include:

Transistor-transistor logic Small Scale Integration jelly-bean logic chips - no longer used for CPUs
Programmable Array Logic and Programmable logic devices - no longer used for CPUs
Emitter Coupled Logic gate arrays - no longer common
CMOS gate arrays - no longer used for CPUs
CMOS ASICs - what's commonly used today, they're so common that the term ASIC is not used for CPUs
Field Programmable Gate Arrays - common for soft microprocessors, and more or less required for reconfigurable computing
A CPU design project generally has these major tasks:

programmer-visible instruction set architecture, which can be implemented by a variety of microarchitectures
architectural study and performance modeling
RTL (eg. logic) design and verification
circuit design of speed critical components (caches, registers, ALUs)
logic synthesis or logic-gate-level design
timing analysis to confirm that all logic and circuits will run at the specified operating frequency
physical design including floorplanning, place and route of logic gates
checking that RTL, gate-level, transistor-level and physical-level representatations are equivalent
checks for signal integrity, chip manufacturability
As with most complex electronic designs, the logic verification effort (proving that the design does not have bugs) now dominates the project schedule of a CPU.

Key CPU architectural innovations include cache, virtual memory, instruction pipelining, superscalar, CISC, RISC, virtual machine, emulators, microprogram, and stack.


Goals
The first CPUs were designed to do mathematical calculations faster and more reliably than human computers.

Each successive generation of CPU might be designed to achieve some of these goals:

higher performance levels of a single program or thread
higher throughput levels of multiple programs/threads
less power consumption for the same performance level
lower cost for the same performance level
greater connectivity to build larger, more parallel systems
more specialization to aid in specific targeted markets
Re-designing a CPU core to a smaller die-area helps achieve several of these goals.

Shrinking everything (a "photomask shrink"), resulting in the same number of transistors on a smaller die, improves performance (smaller transistors switch faster), reduces power (smaller wires have less parasitic capacitance) and reduces cost (more CPUs fit on the same wafer of silicon).
Releasing a CPU on the same size die, but with a smaller CPU core, keeps the cost about the same but allows higher levels of integration within one VLSI chip (additional cache, multiple CPUs, or other components), improving performance and reducing overall system cost.

Performance analysis and benchmarking
Main article: Computer performance
Because there are too many programs to test a CPU's speed on all of them, benchmarks were developed. The most famous benchmarks are the SPECint and SPECfp benchmarks developed by Standard Performance Evaluation Corporation and the ConsumerMark benchmark developed by the Embedded Microprocessor Benchmark Consortium EEMBC.

Some important measurements include:

Instructions per second - Most consumers pick a computer architecture (normally Intel IA32 architecture) to be able to run a large base of pre-existing pre-compiled software. Being relatively uninformed on computer benchmarks, some of them pick a particular CPU based on operating frequency (see Megahertz Myth).
FLOPS - The number of floating point operations per second is often important in selecting computers for scientific computations.
Performance per watt - System designers building parallel computers, such as Google, pick CPUs based on their speed per watt of power, because the cost of powering the CPU outweighs the cost of the CPU itself. [1][2]
Some system designers building parallel computers pick CPUs based on the speed per dollar.
System designers building real-time computing systems want to guarantee worst-case response. That is easier to do when the CPU has low interrupt latency and when it has deterministic response. (DSP)
Computer programmers who program directly in assembly language want a CPU to support a full featured instruction set.
Low power - For systems with limited power sources (e.g. solar, batteries, human power).
Small size or low weight - for portable embedded systems, systems for spacecraft.
Environmental impact - Minimizing environmental impact of computers during manufacturing and recycling as well during use. Reducing waste, reducing hazardous materials. (see Green computing).

Some of these measures conflict. In particular, many design techniques that make CPU run faster make the "performance per watt", "performance per dollar", and "deterministic response" much worse, and vice versa.


Markets
There are several different markets in which CPUs are used. Since each of these markets differ in their requirements for CPUs, the devices designed for one market are in most cases inappropriate for the other markets.


General purpose computing
The vast majority of revenues generated from CPU sales is for general purpose computing. That is, desktop, laptop and server computers commonly used in businesses and homes. In this market, the Intel IA-32 architecture dominates, with its rivals PowerPC and SPARC maintaining much smaller customer bases. Yearly, hundreds of millions of IA-32 architecture CPUs are used by this market.

Since these devices are used to run countless different types of programs, these CPU designs are not specifically targeted at one type of application or one function. The demands of being able to run a wide range of programs efficiently has made these CPU designs among the more advanced technically, along with some disadvantages of being relatively costly, and having high power consumption.


High-end processor economics
Developing new, high-end CPUs is a very costly proposition. Both the logical complexity (needing very large logic design and logic verification teams and simulation farms with perhaps thousands of computers) and the high operating frequencies (needing large circuit design teams and access to the state-of-the-art fabrication process) account for the high cost of design for this type of chip. The design cost of a high-end CPU will be on the order of US $100 million. Since the design of such high-end chips nominally takes about five years to complete, to stay competitive a company has to fund at least two of these large design teams to release products at the rate of 2.5 years per product generation.

As an example, the typical loaded cost for one computer engineer is often quoted to be $250,000 US dollars/year. This includes salary, benefits, CAD tools, computers, office space rent, etc. Assuming that 100 engineers are needed to design a CPU and the project takes 4 years.

Total cost = $250,000/engineer-man_year X 100 engineers X 4 years = $100,000,000 US dollars.

The above amount is just an example. The design teams for modern day general purpose CPUs have several hundred team members.

Only the personal computer mass market (with production rates in the hundreds of millions, producing billions of dollars in revenue) can support such a large design and implementation teams.[citation needed] As of 2004, only four companies are actively designing and fabricating state of the art general purpose computing CPU chips: Intel, AMD, IBM and Fujitsu.[citation needed] Motorola has spun off its semiconductor division as Freescale as that division was dragging down profit margins for the rest of the company. Texas Instruments, TSMC and Toshiba are a few examples of a companies doing manufacturing for another company's CPU chip design.


Scientific computing
A much smaller niche market (in revenue and units shipped) is scientific computing, used in government research labs and universities. Previously much CPU design was done for this market, but the cost-effectiveness of using mass markets CPUs has curtailed almost all specialized designs for this market. The main remaining area of active hardware design and research for scientific computing is for high-speed system interconnects.

See main article Supercomputers.


Embedded design
As measured by units shipped, most CPUs are embedded in other machinery, such as telephones, clocks, appliances, vehicles, and infrastructure. Embedded processors sell in the volume of many billions of units per year, however, mostly at much lower price points than that of the general purpose processors.

These single-function devices differ from the more familiar general-purpose CPUs in several ways:

Low cost is of utmost importance.
Power dissipation is highly important as most embedded systems do not allow for fans.
To give lower system cost, peripherals are integrated with the processor on the same silicon chip.
The program and data memories are often integrated on the same chip. When the only allowed program memory is ROM, the device is known as a microcontroller.
Interrupt latency is more important to these embedded devices and their associated functions than to more general-purpose processors.
Embedded Devices must be in production (or have stockpiles that can last) for long amounts of time, perhaps for a decade. Any particular version of desktop computing CPUs rarely stay in production for more than two years due to the rapid pace of progress.

See main articles microcontroller and system-on-a-chip.


Soft microprocessor cores
For embedded systems, the highest performance levels are often not needed or desired due to the power consumption requirements. This allows for the use of processors which can be totally implemented by logic synthesis techniques. These synthesized processors can be implemented in a much shorter amount of time, giving quicker time-to-market.

Main article: Soft microprocessor

Micro-architectural concepts
See main article Microarchitecture.







Research Topics

[edit] Optical communication
One interesting possibility would be to eliminate the front side bus. Modern vertical laser diodes enable this change. In theory, an optical computer's components could directly connect through a holographic or phased open-air switching system. This would provide a large increase in effective speed and design flexibility, and a large reduction in cost. Since a computer's connectors are also its most likely failure point, a busless system might be more reliable, as well.

Optical processors
Another farther-term possibility is to use light instead of electricity for the digital logic itself. In theory, this could run about 30% faster and use less power, as well as permit a direct interface with quantum computational devices. The chief problem with this approach is that for the foreseeable future, electronic devices are faster, smaller (i.e. cheaper) and more reliable. An important theoretical problem is that electronic computational elements are already smaller than some wavelengths of light, and therefore even wave-guide based optical logic may be uneconomic compared to electronic logic. The majority of development effort, as of 2006 is focused on electronic circuitry. See also optical computing.


Clockless CPUs
Yet another possibility is the "clockless CPU" (asynchronous CPU). Unlike conventional processors, clockless processors have no central clock to coordinate the progress of data through the pipeline. Instead, stages of the CPU are coordinated using logic devices called "pipe line controls" or "FIFO sequencers." Basically, the pipeline controller clocks the next stage of logic when the existing stage is complete. In this way, a central clock is unnecessary.

It might be easier implement high performance devices in asynchronous logic as opposed to clocked logic:

components can run at different speeds in the clockless CPU. In a clocked CPU, no component can run faster than the clock rate.
In a clocked CPU, the clock can go no faster than the worst-case performance of the slowest stage. In a clockless CPU, when a stage finishes faster than normal, the next stage can immediately take the results rather than waiting for the next clock tick. A stage might finish faster than normal because of the particular data inputs (multiplication can be very fast if it is multiplying by 0 or 1), or because it is running at a higher voltage or lower temperature than normal.
Asynchronous logic proponents believe these capabilities would have these benefits:

lower power dissipation for a given performance level
highest possible execution speeds
Two examples of asynchronous CPUs are the ARM-implementing AMULET and the asynchronous implementation of MIPS R3000, dubbed MiniMIPS.

The biggest disadvantage of the clockless CPU is that most CPU design tools assume a clocked CPU (a synchronous circuit), so making a clockless CPU (designing an asynchronous circuit) involves modifying the design tools to handle clockless logic and doing extra testing to ensure the design avoids metastable problems. For example, the group that designs the aforementioned AMULET developed a tool called LARD to cope with the complex design of AMULET3.

Another disadvantage is the overhead needed for handshaking signals

A smaller disadvantage is how these devices would operate with Automated Test Equipment chip testers that are more geared for synchronous behavior.


intelligent RAM
One way to work around the von Neumann bottleneck is to mix the a processor and DRAM all one one chip.

The Berkeley Intelligent RAM (IRAM) project [3]
eDRAM

[edit] References
Hwang, Enoch (2006). Digital Logic and Microprocessor Design with VHDL. Thomson. ISBN 0-534-46593-5.
Processor Design: An Introduction - Detailed introduction to microprocessor design. Somewhat incomplete and outdated, but still worthwhile.